1. Field of the Invention
The present invention relates to a charge coupled device (CCD) and a driving method, and more particularly, to a CCD for a four phase clocking signal and a driving method thereof with improved charge transfer efficiency.
2. Discussion of Related Art
FIG. 1 shows a layout of a conventional CCD. In such a conventional CCD, electric charges are generated by light, transferred by a plurality of CCD cells which are arranged in a predetermined direction, and detected by a detector in the CCD. In other words, output signals are obtained by transferring electric charges excited by light through a plurality of channels and by amplifying the electric charges.
As shown in FIG. 1, a CCD which transforms video signals into electrical signals includes a pixel array having a plurality of unit cells. Each unit cell includes a photodiode (PD) which is a light-receiving region and a vertical charge coupled device (VCCD) which receives signal charges generated and accumulated in the photodiode. The CCD also includes a horizontal charge coupled device (HCCD) and a signal detector. Signal charges accumulated in photodiodes are outputted by the signal detector after being transferred to the VCCD and the HCCD.
FIG. 2 and FIGS. 3A-3C illustrate a CCD wherein a unit cell of the CCD for a four-phase locking signal is taken as a basis. FIG. 2 is a layout, FIG. 3A is a cross-sectional view taken along the line I--I in FIG. 2, FIG. 3B is a cross-sectional view taken along the line II--II in FIG. 2, and FIG. 3C shows a cross-sectional view taken along the line III--III in FIG. 2.
In the CCD shown in FIGS. 2 and 3A-3C, a P type well P-well 11 is formed in an N type substrate N-sub 10. In the P-well 11, an N type well N-well 12 for a vertical charge coupled device region and a plurality of N type photodiodes N-PD 14 are arranged. A channel stopping layer CST 16 heavily doped with P type impurities is also formed in the P-well 11 surrounding a unit cell consisting of the N type photodiode N-PD 14 and a portion of the vertical charge coupled device.
A first insulating layer 21 is formed on the substrate which includes the photodiodes N-PD 14, the vertical charge coupled device and the channel stopping layer CST 16. Four transferring electrodes V1, V2, V3 and V4 having a three-level structure are formed on the first insulating layer 21.
The four transferring electrodes V1, V2, V3 and V4 are arranged in order. The level structure of the four transferring electrodes in a wire region, i.e., the space between two photodiodes, is shown in FIGS. 3B. The first transferring electrode VI is over the first insulating layer 21. The second and the fourth transferring electrodes V2 and V4, with ends extended beyond the first transferring electrode V1, are located over the first transferring electrode V1. The third transferring electrode V3 is located over the second and the fourth transferring electrodes V2 and V4.
FIG. 4 shows clocking pulses during a reading mode when signal charges of photodiodes are transferred to a vertical charge coupled device in the conventional CCD. FIGS. 5A-5C show transfer potential profiles of the CCD along lines I--I, II--II and III--III in FIG. 2, respectively.
Referring to FIG. 4, at time t1, the pulses of (V1, V2, V3, V4) are (L,H,H,H) and the potential profile is expressed as the dotted line shown in FIGS. 5A to SC. The substrate portion corresponding to the lower part of the first transferring electrode V1 has a first energy level, while the substrate portions corresponding to the lower parts of the second and the fourth transferring electrodes V2 to V4 have a second energy level lower than the first energy level.
As shown in FIG. 5C, the P type well P-well 11 works as a potential barrier between the potential wells of the photodiode N-PD 14 and the vertical charge coupled device VCCD in the N-well 12, since the energy level of the P type well P-well 11 is higher than that of the N type well N-well 12. The electric charges generated by light in the photodiode N-PD 14 are held in the potential well of the photodiode N-PD 14 until the barrier disappears instead of being transferred directly to the vertical charge coupled device in the N-well 12.
At time t2, the pulses of (V1, V2, V3, V4) are (L,H,HH,H) and the potential profile is expressed as the solid line shown in FIGS. 5A to 5C. Compared with the profile at t1, the substrate portions corresponding to the first, the second and the fourth transferring electrodes V1, V2 and V4 maintain the same energy level. However, the substrate portion corresponding to the lower part of the third transferring electrode V3 has a third energy level which is lower than the second energy level. Namely, the substrate portion corresponding to the lower part of the third electrode V3 has the third energy level when a high pulse is applied to the third transferring electrode V3.
As shown in FIG. 5C, signal charges stored in the photodiode N-PD 14 move into the ubstrate corresponding to the lower part of the third transferring electrode V3 since the potential barrier between the channels of the photodiode N-PD 14 and the vertical charge coupled device in the N-well 12 becomes sufficiently lower than the energy level of the photodiode N-PD 14 due to the high pulse applied to the third transferring electrode V3. Namely, electrons trapped in the potential well of the photodiode N-PD 14 are transferred to the vertical charge coupled device in the N-well 12 as the third transferring electrode V3 works as a reading gate.
At this time, the potential well of the wire region remains unchanged by the first, the second and the fourth transferring electrodes V1, V2, and V4 when the high pulse is applied to the third transferring electrode V3 during the reading mode. Thus, the potential well of the wire region is stable at t2 as compared to that at t1, thereby resulting in a charge transfer in one way from the photodiode N-PD 14 to the vertical charge coupled device.
At time t3, since the pulses of (V1, V2, V3, V4) are (L,H,H,H), i.e., the same as at t1, the potential profile is expressed as the dotted line shown in FIGS. 5A to 5C, which is the same as those at t1. As the substrate corresponding to the lower part of the third transferring electrode V3 becomes higher, so does the potential barrier between the photodiode N-PD 14 and the vertical charge coupled device. Eventually, the potential profiles become the same as the dotted line, thereby stopping the charge transfer from the N-PD 14 to the vertical charge coupled device. Then, the CCD proceeds in the following sequences so that signal charges are transferred when the four phase clocking signal is applied to the four charge transfer electrodes V1-V4.
As shown in FIG. 5A, the driving pulse for the reading mode makes the third transferring electrode V3 function as the reading gate. Only the third transferring electrode V3 becomes turned on. Therefore, an image lag may happen due to the insufficient charge transfer which results from the narrow width of the charge transfer path from the photodiode to the vertical charge coupled device.
FIG. 6 shows a potential profile of a photodiode and a vertical charge coupled device according to another type of conventional CCD. Here, the second transferring electrode V2 together with the third transferring electrode V3 may be used for reading. But, during a reading mode, stable charge transfers from the photodiode to the vertical charge coupled device is hard to achieve since the potential well of the photodiode varies due to the high pulse applied to the second transferring electrode V2. That is because the second transferring electrode V2 is located at a position which influences the profiles of the potential well of the photodiode in the wire region.
Referring to FIG. 6, compared to the potential level shown in FIG. 5B at time t1, the potential level of the substrate corresponding to the photodiode is lowered since a high pulse is applied to the second transferring electrode V2 when the second transferring electrode V2 is used as the reading gate. As a result, a portion of electric charges which are supposed to be transferred to the vertical charge coupled device are gathered at the substrate portion corresponding to the second transferring electrode in the wire region. Therefore, the charge transfer efficiency from the photodiode to the vertical charge coupled device is lowered. Also, signal charges may be mixed with each other when there are excessive electric charges due to the lowered barrier between the adjacent photodiodes.
Accordingly, an improved structure of the transferring electrode in the wire region is desired. Also, a driving method for widening a charge transfer path from a photodiode to a vertical charge coupled device is required.